Calix provides the cloud, software platforms, systems and services required for communications service providers to simplify their businesses, excite their subscribers and grow their value.

The Hardware Engineering Manager leads an internal PCBA design team while managing a deep, co-development partnership with an external JDM partner. The team of engineers will be responsible for the end-to-end lifecycle of complex PCBAs. This role balances the strategic co-development of new products with a JDM partner and the post-launch management of the existing products. You will be the technical bridge between our JDM partners, internal R&D, and the global field support organization. This role ensures that internal requirements and proprietary IP are seamlessly integrated with the partner’s manufacturing strengths and technical resources to deliver high-quality, scalable hardware

NPI Project Design & Development (The JDM Model):

• Collaborative Design: Lead the PCBA team in co-authoring schematics and layouts with JDM partners, ensuring our proprietary IP is integrated correctly.

• Partner Orchestration: Act as the technical gatekeeper for the JDM partner, conducting rigorous design reviews to ensure adherence to internal standards for performance, cost, and reliability.

• Requirements Management: Translate product visions into detailed Engineering Specification Documents (ESDs) that drive the JDM partner’s execution.

• Prototyping & Bring-up: Oversee initial PCBA bring-up and validation phases (EVT/DVT/PVT), ensuring the JDM partner meets all hardware checkpoints before mass production.

• Cross-Functional Team Support: Ensure that the development team integrates well with cross-functional teams from SW, TestEng, Operations, Global Supply Chain, and Quality organizations

Sustaining Engineering & Lifecycle Management:

• Value Engineering: Identify opportunities for cost reduction, component second-sourcing, and yield improvement throughout the product’s life.

• PCN/EOL Management: Lead the team in responding to Component End-of-Life (EOL) notices and managing Process Change Notifications (PCN) from the JDM partner.

• Compliance Maintenance: Ensure ongoing adherence to global regulatory standards (FCC, CE, RoHS) as design iterations occur during the sustaining phase.

Field Issue Resolution & Root Cause Analysis:

• Escalation Leadership: Serve as the primary technical point of contact for critical field failures, directing the team to perform deep-dive Root Cause Analysis (RCA).

• RMA Analysis: Analyze Return Merchandise Authorization (RMA) data to identify trends, manufacturing defects, or design weaknesses, and coordinate with the JDM partner to implement corrective actions.

• Failure Analysis (FA): Oversee advanced failure analysis techniques (e.g., X-ray, cross-sectioning, SEM) to solve complex electrical or mechanical PCBA issues.

Qualifications:

• 6+ years in Hardware Development – working with JDM or ODM partnerships is a plus.

• 3+ years of people‑management experience, including conducting performance reviews, providing constructive feedback, coaching junior engineers, and supporting their career development.

• Proven track record in high-speed digital design, power management, and multi-layer PCBA manufacturing.

• Strong project leadership skills: ability to drive schedules, manage risk, and align execution across partner

• Degree in Electrical Engineering or a related engineering discipline required.

Location:

• This is an on-site position in Petaluma, CA.

The base pay range for this position varies based on the geographic location. More information about the pay range specific to candidate location and other factors will be shared during the recruitment process. Individual pay is determined based on location of residence and multiple factors, including job-related knowledge, skills and experience.

San Francisco Bay Area:

142,600 - 242,700 USD Annual124,000 - 211,000 USD Annual